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NEO to Boost HBM Performance with New 3D X-AI Chip

NEO Semiconductor, a leading developer of innovative technologies for 3D NAND flash memory and 3D DRAM, has developed the 3D X-AI™ chip technology.

Primarily, this technology is targeted to replace the current DRAM chips inside high bandwidth memory (HBM). It aims to solve data bus bottlenecks by enabling AI processing in 3D DRAM. Additionally, 3D X-AI can reduce the huge amount of data transferred between HBM and GPUs during AI workloads. Thus, NEO’s innovation is set to revolutionize the performance, power consumption, and cost of AI chips for AI applications like generative AI.

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NEO Semiconductor’s 3D X-AI architecture

Mainly, AI chips with NEO’s 3D X-AI technology can achieve:

  • 100X Performance Acceleration: contains 8,000 neuron circuits to perform AI processing in 3D memory.
  • 99% Power Reduction: minimizes the requirement of transferring data to the GPU for calculation. Thus, it will reduce power consumption and heat generation by the data bus.
  • 8X Memory Density: contains 300 memory layers, allowing HBM to store larger AI models.

“Current AI chips waste significant amounts of performance and power due to architectural and technological inefficiencies,” said Andy Hsu, Founder & CEO of NEO Semiconductor.

“The current AI chip architecture stores data in HBM and relies on a GPU to perform all calculations. This separated data storage and data processing architecture makes the data bus an unavoidable performance bottleneck. Transferring huge amounts of data through the data bus causes limited performance and very high power consumption. 3D X-AI can perform AI processing in each HBM chip. This can drastically reduce the data transferred between HBM and GPU to improve performance and reduce power consumption dramatically.”

Significant Processing and Storage

Specifically, a single 3D X-AI die includes 300 layers of 3D DRAM cells with 128Gbit capacity and one layer of neural circuit with 8,000 neurons. According to NEO’s estimation, this can support up to 10TB/s of AI processing throughput per die. Thus, using 12 3D X-AI dies stacked with HBM packaging can achieve 120TB/s processing throughput. This results in a 100X performance increase.

“The application of 3D X-AI technology can accelerate the development of emerging AI use cases and promote the creation of new ones,” said Jay Kramer, President of Network Storage Advisors. “Harnessing 3D X-AI technology to create the next generation of optimized AI chips will spark a new era of innovation for AI Apps.”

-06 August 2024-