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Altera to Surge FPGA-Based AI for Robotics, Edge

The implementation of physical AI is one of the challenges the industrial sector is facing of late. For that reason, pure-play FPGA solutions provider Altera has introduced its Agilex FPGAs to meet the real-time demands of physical AI systems.

In fact, Altera is enabling a unified sensor-to-actuator architecture that delivers deterministic performance, safety, and adaptability for robotics, industrial vision, and autonomous edge applications. Altera, an Intel company, will formally unveil the Agilex FPGA solutions at the embedded world 2026 in Nuremberg, Germany from March 10 to 12.

Meets Rigid Requirements

In industrial robotics and edge AI applications, it is important for physical AI systems to sense, process, and act in real time. Moreover, it is also important for the system to meet strict requirements for deterministic latency, power efficiency, functional safety, security, and long product lifecycles.

Of late, adoption of physical AI systems is gaining ground across robotics, industrial automation, smart infrastructure, and autonomous machines. Altera’s adaptable FPGA platforms provide scalable acceleration from multi-sensor ingestion and AI inference to real-time control.

The company will be demonstrating at Embedded World how its FPGAs power multi-sensor processing, AI-driven perception, and low-latency decision making at the edge.

Specifically, the demo will show how an AI-enabled camera and sensor fusion pipeline ingest, synchronize, and stitch for industrial environments. It will demonstrate a high-resolution imaging pre-processing and enhancement for advanced medical systems. Furthermore, it will show how a robotics showcase that demonstrate deterministic, low-latency control and closed-loop autonomous operation.

These demonstrations are built on Agilex 3 and Agilex 5 FPGAs and SoCs, optimized for deterministic, real-time edge deployments. Their reconfigurable architecture allows developers to adapt to evolving sensors, AI models, and workloads, while supporting flexible design partitioning, from bridging and aggregation to AI acceleration or standalone inference.

05 March 2026