Synopsys, Inc. and GlobalFoundries (GF) have collaborated to bring chip design tapeout program to universities worldwide.

The partnership aligns with their respective GFLabs program of GF and the Synopsys Academic & Research Alliances (SARA) initiative of Synopsys, which both advance semiconductor innovation through R&D and academic collaboration. Particularly, the pilot initiative gives researchers, professors and students hands-on access to real-world chip design and manufacturing.

By dramatically lowering the cost barrier to custom silicon, the program enables academic institutions to turn their design concepts into working silicon, expanding opportunities for education, research and workforce development.

Skills Driving Innovations

Forty universities worldwide are participating in the sponsored open-source 180MCU pilot launching towards the end of the year. Synopsys will provide comprehensive support including professional-grade electronic design automation (EDA) tools, training and design collateral leveraging the Synopsys Cloud design platform. Once designs are finalized, GF will manufacture the chips through its GlobalShuttle Multi-Project Wafer Program, which aggregates designs from multiple institutions onto a single wafer for fabrication.

“Partnering with GlobalFoundries to bring a full ‘chip design to tapeout’ course to universities is a game changer,” said Dr. Patrick Haspel, executive director of SARA at Synopsys. “This collaboration will empower students with practical, hands-on experience using advanced tools and technologies – skills that are critical to drive innovation in the semiconductor industry. Together, we’re not just teaching design – we’re building the next generation of engineers who will shape the future of silicon.”

Advancing Semiconductor Innovation
The next phase of Synopsys-GF tapeout collaboration will bring these technologies directly into classrooms and embedding hands-on design and testing into academic course curriculum. With the goal of having students collaborate in a design class, Synopsys will provide training to professors on how to lead this course. Following a shuttle run, the second course will dive into classroom testing with chips returned for the next semester.

“This program reflects our deep commitment to advancing semiconductor innovation and cultivating the next generation of talent,” said Bika Carter, director of external R&D at GF. “By giving students and researchers the opportunity to bring their designs from concept to silicon, we’re enriching chip design education and helping shape the future of our industry.”

The combination of Synopsys and GlobalFoundries brings together industry-leading EDA design tools and advanced manufacturing, empowering academic institutions to offer students an integrated, real-world journey through the semiconductor process.