Singapore-headquartered test company AEM Holdings and Taiwanese OSAT provider ASE Technology Holding have entered a strategic partnership that underscores how semiconductor testing is becoming a critical battleground in the race to scale artificial intelligence (AI) and high‑performance computing (HPC).

The collaboration brings together AEM’s proprietary test technologies and ASE’s global manufacturing and test footprint, positioning both companies to address the growing complexity of next‑generation AI and HPC chips. As workloads become more data‑intensive and architectures more heterogeneous, advanced testing capabilities are emerging as a key differentiator for chipmakers and outsourced semiconductor assembly and test (OSAT) providers.

Supports Stringent Requirements

Under the agreement, AEM will raise approximately S$12 million through a private placement of new shares to a wholly owned subsidiary of ASE, representing just over 1% of AEM’s issued share capital as of March 21, 2026. ASE will also receive free detachable warrants, exercisable in two tranches subject to revenue‑related conditions, potentially increasing its stake further if exercised. ‘

Beyond the financial investment, the partnership centers on the joint integration of AEM’s highly parallel test architectures and advanced thermal management capabilities into ASE’s manufacturing and test environments. These technologies are designed to support the stringent performance, reliability, and thermal requirements of AI accelerators and HPC processors.

Moreover, the collaboration also supports ISE Labs, a wholly owned ASE subsidiary, as it expands its capabilities in early‑stage AI and HPC processor development. This includes testing, validation, and characterization for advanced packaging approaches such as multi‑chiplet designs, system‑in‑package architectures, and emerging optical interconnect technologies—areas increasingly critical to next‑generation compute platforms.

For industry players, the AEM–ASE partnership reflects a broader shift: testing is no longer a back‑end consideration but a strategic enabler of AI scale‑up. As chip complexity rises and time‑to‑market pressures intensify, collaborations that combine deep test innovation with global manufacturing scale are likely to shape the competitive landscape of the AI and HPC semiconductor ecosystem.

31 March 2026