ANSYS, Inc. said AI-driven networks provider Juniper Networks, Inc. has tapped its software to accelerate production of high-speed networking chips. Particularly, Ansys helps Juniper achieve highly predictively accurate power integrity signoff in less time.

Here, a massively parallelizable design methodology achieves greater switching coverage and improved reliability.

Networking chips are some of the largest, most complex chips in the semiconductor industry and are vital components in all data transfer applications. Mostly, these applications include telecommunications, internet switching, and high-speed data center hardware. In addition, advanced networking products often require the successful integration of multiple sub-chip coming together to form a single system solution.

Plays Crucial Role

Juniper faced several challenges while implementing their latest 7nm high-speed networking product. Particularly, the capacity to analyze a design with over 60 billion transistors and to ensure reliable dynamic and static voltage drop (DVD) coverage for switching scenarios. In addition, the hierarchical support needed to enable full-system analysis across multiple integrated circuits.

Consequently, Juniper chose Ansys’ RedHawk-SC’s distributed processing capabilities. This significantly accelerates the power integrity signoff for their newest high-performance networking chips. Ansys’ hierarchical Chip Power Model also facilitated high-fidelity power network co-simulation of the chip and package.

“Despite the increasing size and complexity of our networking solutions, Ansys RedHawk-SC enabled our design teams to deliver outstanding results,” said Debashis Basu, Senior Vice President, Engineering at Juniper Networks. “The software was very easy to distribute in our on-premises cloud via standard memory machines. Its advanced features were crucial in delivering more reliable networking products to market faster.”

Delivers High Speed, Capacity

Ansys RedHawk-SC leads the industry in power noise and reliability sign off for digital IP and SoC down to 3nm. Thus, its powerful analytics quickly identify weaknesses and allow what-if explorations to optimize power and performance. Moreover, the software’s cloud-optimized architecture enables the speed and capacity needed for full-chip analysis.

“Our comprehensive suite of integrated electronics tools quickly solve the power management challenges inherent in today’s ultra-large and complex chip designs,” said John Lee, Vice President and General Manager of the Semiconductor, Electronics and Optics business unit at Ansys. “Ansys RedHawk-SC plays a big part in Juniper’s overarching, cloud-enabled strategy for delivering higher speed and capacity. Our broad platform of multiphysics signoff analysis products consistently help our customers optimize their design performance, while reducing the project and technology risks at the leading edge of semiconductor technology.”